AHDL

Implementing Tri-State Buses



TRI primitives that drive OUTPUT or BIDIR ports have an output enable input for placing the pin output in a high-impedance state in which it behaves as if it is not connected to the circuit.

You can create a tri-state bus by connecting TRI primitives and BIDIR or OUTPUT ports together with a node of type TRI_STATE_NODE. The control circuitry must ensure that at most one output is enabled (that is, not in a high-impedance state) at any given time. This enabled output can transmit low (0) and high (1) logic levels onto the bus.

The tri_bus.tdf file shown below implements a tri-state bus using a TRI_STATE_NODE-type node created in a Node Declaration:

SUBDESIGN tri_bus
(
   in[3..1], oe[3..1] : INPUT;
   out1               : OUTPUT;
)

VARIABLE
   tnode : TRI_STATE_NODE;
BEGIN
   tnode = TRI(in1, oe1);
   tnode = TRI(in2, oe2);
   tnode = TRI(in3, oe3);
   out1 = tnode;
END;

In tri_bus.tdf, multiple assignments to tnode tie the signals together. The TRI_STATE_NODE node type, rather than the ordinary NODE node type, is required to implement a tri-state bus: multiple assignments to nodes of type NODE tie the signals together by wired-AND or wired-OR functions; whereas multiple assignments to a TRI_STATE_NODE tie the signals to the same node. However, if only one variable is assigned to a TRI_STATE_NODE-type node, it is treated as an ordinary NODE instead.


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