F-CPU project, nov. 29 2000 by Yann GUIDON (whygee@f-cpu.org)

This file describes the capabilities of the current version of
this file bundle. Please update this file if you modify something.

------+------+-----+-----+------+---------+----------------
UNIT  | SIMD | 32b | 64b | 128+ | latency | architectures 
------+------+-----+-----+------+---------+----------------
INC   |      |     |     |      |         |
ASU   |      |     |  *  |  *   | 1 or 2  | 
IMU   |      |     |     |      |         |
LSU   |      |     |     |      |         |
IDU   |      |     |     |      |         |
SHL   |      |     |     |      |         |
ROP2  |      |  *  |  *  |  *   |    1    |
POPC  |      |     |     |      |         |


YG, Fri Dec 15 20:10:41 MET 2000
It appears that the 32-b versions will not be supported in the
beginning. If you require a 32-b version, you'll have to either
do it (and of course redistribute it under the GPL) or use LEON.

The 128+ versions are 64-b versions where some execution units
are duplicated in a SIMD way (ie : ASU, IMUL, INC), that is :
a 256-bit ASU is a set of four 64-bit (normal) ASU which drive
the 256-bit buses parallely. Some other
units are simply scaled up (ROP2, LSU). Some other units are still
undefined, it sometimes doesn't make sense to have larger versions.
Anyway, the 128+ versions will provide downsized versions of the
instructions (with and without SIMD support).
